First-level areas：Equipment Design and Manufacturing
First-level areas：Automated machinery and intelligent equipment
Source：Social Recruitment
Job description ：
Job Responsibilities.
1. Responsible for assessing the hardware security vulnerabilities of the product, developing and implementing test cases around the product. Identify and analyze the identified issues, and propose modification suggestions or mitigation measures.
2. Responsible for the construction and maintenance of the hardware security laboratory evaluation tool platform.
3. Responsible for capacity building in the field of hardware security evaluation, completing the development, release, and maintenance of security testing related specifications or security privacy testing baselines or attack pattern libraries, and leading research on new methods in hardware evaluation directions such as side channels and fault injection.
4. Track the technical requirements and testing standards, methods, and specifications of regulatory agencies, clients, and industry security organizations, participate in the planning of security testing technology in this field, and establish and maintain capability maps (technologies, tools, etc.).
Job requirements.
1. More than 4 years of experience in hardware security assessment, proficient in typical hardware security assessment methods (side channel, fault injection, single board/chip security assessment, etc.), able to independently undertake hardware vulnerability reproduction, vulnerability mining, and vulnerability assessment in the field of hardware end to end implementation plan for utilization.
2. Familiar with hardware platform architecture, circuit design, PCB layout, circuit debugging, and various hardware interface debugging principles; Proficient in using commonly used electronic components and adept at searching for various component materials;
3. Proficient in using relevant assessment tools and various instruments and equipment to complete hardware security assessments;
4. Familiar with common cryptographic algorithms and symmetric and asymmetric cryptographic systems (AES/TDES/RSA/HASH/ECDH, etc.);
5. Strong coordination and communication skills; Simultaneously possessing analysis of difficult problems;
Bonus points.
1. Priority will be given to those with outstanding abilities in smart hardware cracking competitions such as HackPwn and GeekPwn;
2. Deliver personal keynote speeches or publish high-quality original technical articles at well-known cybersecurity conferences or academic conferences.
Key work items.
1. Introduction of access security review for chips and modules;
2. Review of hardware security solutions;
3. Security assessment of Bluetooth communication protocol, LAN communication protocol, and end-to-end cloud communication security protocol, and recommended output of solutions;
4. Hardware vulnerability assessment, benchmarking against various IoT requirements, evaluating gap items.

Please send your CV or resume as an attachment to the following email address:
mailto: rbhr@hrcenter.co.uk
With the subject line formatted as: ‘Name + Position + Company Name + Location’.